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ASPDAC
2005
ACM
127views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Clock network minimization methodology based on incremental placement
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
Liang Huang, Yici Cai, Qiang Zhou, Xianlong Hong, ...
ATAL
2005
Springer
14 years 1 months ago
T-Man: Gossip-Based Overlay Topology Management
Overlay topology plays an important role in P2P systems. Topology serves as a basis for achieving functions such as routing, searching and information dissemination, and it has a m...
Márk Jelasity, Özalp Babaoglu
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Register binding and port assignment for multiplexer optimization
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
Deming Chen, Jason Cong
IEEEPACT
2003
IEEE
14 years 29 days ago
Memory Hierarchy Design for a Multiprocessor Look-up Engine
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
Jean-Loup Baer, Douglas Low, Patrick Crowley, Neal...
INFOCOM
2003
IEEE
14 years 29 days ago
Modeling Malware Spreading Dynamics
— In this paper we present analytical techniques that can be used to better understand the behavior of malware, a generic term that refers to all kinds of malicious software prog...
Michele Garetto, Weibo Gong, Donald F. Towsley