Torus, mesh, and flattened butterfly networks have all been considered as candidate architectures for on-chip interconnection networks. In this paper, we study the problem of opti...
Personal webservers have proven to be a popular means of sharing files and peer collaboration. Unfortunately, the transient availability and rapidly evolving content on such host...
Mayank Bawa, Roberto J. Bayardo Jr., Sridhar Rajag...
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...
The paper proposes an architecture for a scheduling algorithm, to be integrated in IEEE 802.11 Access Points (AP), able to take into account, besides the transport service class r...
Rosario Giuseppe Garroppo, Stefano Giordano, Stefa...