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ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
14 years 1 months ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
CAL
2006
13 years 7 months ago
A Page-based Hybrid (Software-Hardware) Dynamic Memory Allocator
Modern programming languages often include complex mechanisms for dynamic memory allocation and garbage collection. These features drive the need for more efficient implementation ...
Wentong Li, Saraju P. Mohanty, Krishna M. Kavi
WSC
1998
13 years 9 months ago
Parallel Implementation of a Molecular Dynamics Simulation Program
We have taken a NIST molecular dynamics simulation program (md3), which was configured as a single sequential process running on a CRAY C90 vector supercomputer, and parallelized ...
Alan Mink, Christophe Bailly
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 27 days ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
POPL
2008
ACM
14 years 8 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman