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SIPS
2007
IEEE
14 years 1 months ago
Design and Analysis of LDPC Decoders for Software Defined Radio
Low Density Parity Check (LDPC) codes are one of the most promising error correction codes that are being adopted by many wireless standards. This paper presents a case study for ...
Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali...
VLSISP
2010
119views more  VLSISP 2010»
13 years 2 months ago
Hardware Acceleration of HMMER on FPGAs
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
Steven Derrien, Patrice Quinton
DAC
2008
ACM
14 years 8 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
MM
2003
ACM
146views Multimedia» more  MM 2003»
14 years 19 days ago
Supporting timeliness and accuracy in distributed real-time content-based video analysis
Real-time content-based access to live video data requires content analysis applications that are able to process the video data at least as fast as the video data is made availab...
Viktor S. Wold Eide, Frank Eliassen, Ole-Christoff...
IWSSD
2000
IEEE
13 years 11 months ago
Issues in Analyzing the Behavior of Event Dispatching Systems
A good architecture is a necessary condition to guarantee that the expected levels of performance, availability, fault tolerance, and scalability are achieved by the implemented s...
Giovanni Bricconi, Emma Tracanella, Elisabetta Di ...