418 search results - page 8 / 84 » Implementation of a Streaming Execution Unit |
ISPASS
2010
IEEE
14 years 2 months ago
2010
IEEE
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
CONPAR
1992
13 years 11 months ago
1992
The Asynchronous Polycyclic Architecture (APA) is a new processor design for numerically intensive applications. APA resembles the VLIW architecture, in that it provides independen...
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
FCCM
2003
IEEE
14 years 27 days ago
2003
IEEE
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...