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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
14 years 7 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
PADS
2005
ACM
14 years 28 days ago
Simulating Realistic Packet Routing without Routing Protocols
A fundamental requirement for any network simulation environment is the realistic forwarding of packets from a source to a destination in the simulated topology. The routing decis...
George F. Riley, Dheeraj Reddy
NLP
2000
13 years 11 months ago
Monte-Carlo Sampling for NP-Hard Maximization Problems in the Framework of Weighted Parsing
Abstract. The purpose of this paper is (1) to provide a theoretical justification for the use of Monte-Carlo sampling for approximate resolution of NP-hard maximization problems in...
Jean-Cédric Chappelier, Martin Rajman
SIGSOFT
2003
ACM
14 years 8 months ago
Towards scalable compositional analysis by refactoring design models
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...
IOPADS
1997
152views more  IOPADS 1997»
13 years 8 months ago
Competitive Parallel Disk Prefetching and Buffer Management
We provide a competitive analysis framework for online prefetching and buffer management algorithms in parallel I/O systems, using a read-once model of block references. This has ...
Rakesh D. Barve, Mahesh Kallahalla, Peter J. Varma...