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DATE
2006
IEEE
104views Hardware» more  DATE 2006»
14 years 4 months ago
Contrasting a NoC and a traditional interconnect fabric with layout awareness
Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
Federico Angiolini, Paolo Meloni, Salvatore Carta,...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 4 months ago
Multiprocessor synthesis for periodic hard real-time tasks under a given energy constraint
The energy-aware design for electronic systems has been an important issue in hardware and/or software implementations, especially for embedded systems. This paper targets a synth...
Heng-Ruey Hsu, Jian-Jia Chen, Tei-Wei Kuo
ICPPW
2006
IEEE
14 years 4 months ago
Dynamic Algorithm Selection in Parallel GAMESS Calculations
Applications augmented with adaptive capabilities are becoming common in parallel computing environments which share resources such as main memory, network, or disk I/O. For large...
Nurzhan Ustemirov, Masha Sosonkina, Mark S. Gordon...
IEEEARES
2006
IEEE
14 years 4 months ago
Digital Signatures with Familiar Appearance for e-Government Documents: Authentic PDF
Abstract— Most e-government applications have to find a solution for simple, reliable, secure and authentic signing of official documents. Citizens need a simple way to verify ...
Thomas Neubauer, Edgar Weippl, Stefan Biffl
ISQED
2006
IEEE
155views Hardware» more  ISQED 2006»
14 years 4 months ago
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs
This paper is concerned with statically analyzing the susceptibility of arbitrary combinational circuits to single event upsets that are becoming a significant concern for reliabi...
Bin Zhang, Wei-Shen Wang, Michael Orshansky