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» Implementing Optimizations at Decode Time
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DAC
2002
ACM
14 years 9 months ago
A flexible accelerator for layer 7 networking applications
In this paper, we present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Most ...
Gokhan Memik, William H. Mangione-Smith
ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
14 years 5 months ago
A high-performance parallel CAVLC encoder on a fine-grained many-core system
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
Zhibin Xiao, Bevan Baas
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
14 years 2 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
LCPC
2007
Springer
14 years 2 months ago
Communicating Multiprocessor-Tasks
The use of multiprocessor tasks (M-tasks) has been shown to be successful for mixed task and data parallel implementations of algorithms from scientific computing. The approach o...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
EUC
2005
Springer
14 years 1 months ago
Realtime H.264 Encoding System Using Fast Motion Estimation and Mode Decision
Abstract. H.264 provides various useful features such as improved coding efficiency and error robustness. These features enable mobile device to adopt H.264/AVC standard to achieve...
Byeong-Doo Choi, Min-Cheol Hwang, Jun-Ki Cho, Jin-...