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» Implementing Optimizations at Decode Time
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VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
14 years 8 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
CGO
2008
IEEE
14 years 2 months ago
Fast liveness checking for ssa-form programs
Liveness analysis is an important analysis in optimizing compilers. Liveness information is used in several optimizations and is mandatory during the code-generation phase. Two dr...
Benoit Boissinot, Sebastian Hack, Daniel Grund, Be...
MICRO
2006
IEEE
124views Hardware» more  MICRO 2006»
14 years 2 months ago
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks
Computer security is severely threatened by software vulnerabilities. Prior work shows that information flow tracking (also referred to as taint analysis) is a promising techniqu...
Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yua...
GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
14 years 1 months ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
MOBICOM
2003
ACM
14 years 1 months ago
Minimum energy disjoint path routing in wireless ad-hoc networks
We develop algorithms for finding minimum energy disjoint paths in an all-wireless network, for both the node and linkdisjoint cases. Our major results include a novel polynomial...
Anand Srinivas, Eytan Modiano