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ICDCN
2009
Springer
15 years 9 months ago
Fault-Tolerant Implementations of Regular Registers by Safe Registers with Applications to Networks
We present the first wait-free and self-stabilizing implementation of a single-writer/single-reader regular register by single-writer/single-reader safe registers. The constructio...
Colette Johnen, Lisa Higham
147
Voted
SIGMETRICS
2011
ACM
196views Hardware» more  SIGMETRICS 2011»
14 years 9 months ago
Performance analysis of the OP2 framework on many-core architectures
We present a performance analysis and benchmarking study P2 “active” library, which provides an abstraction framework for the solution of parallel unstructured mesh applicatio...
M. B. Giles, Gihan R. Mudalige, Z. Sharif, Graham ...
SC
1995
ACM
15 years 6 months ago
PMRSB: Parallel Multilevel Recursive Spectral Bisection
The design of a parallel implementation of multilevel recursive spectral bisection on the Cray T3D is described. The code is intended to be fast enough to enable dynamic repartiti...
Stephen T. Barnard
CLUSTER
2003
IEEE
15 years 7 months ago
Optimized Implementation of Extendible Hashing to Support Large File System Directory
Extendible hashing is a kind of fast indexing technology; it provides with a way of storing structural data records so that each of them can be gotten very quickly. In this paper,...
Rongfeng Tang, Dan Meng, Sining Wu
SIGMOD
2002
ACM
93views Database» more  SIGMOD 2002»
16 years 2 months ago
Implementing database operations using SIMD instructions
Modern CPUs have instructions that allow basic operations to be performed on several data elements in parallel. These instructions are called SIMD instructions, since they apply a...
Jingren Zhou, Kenneth A. Ross