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» Implementing a STARI chip
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DATE
2009
IEEE
130views Hardware» more  DATE 2009»
14 years 3 months ago
Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA
—IP-XACT is a standard for describing intellectual property metadata for System-on-Chip (SoC) integration. Reesearchers have proposed visualizing and abstracting IP-XACT objects ...
Tero Arpinen, Tapio Koskinen, Erno Salminen, Timo ...
INFOCOM
2009
IEEE
14 years 3 months ago
The Crosspoint-Queued Switch
Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch arch...
Josef Kanizo, David Hay, Isaac Keslassy
FMCAD
2009
Springer
14 years 3 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ISW
2009
Springer
14 years 3 months ago
MAC Precomputation with Applications to Secure Memory
We present ShMAC (Shallow MAC), a fixed input length message authentication code that performs most of the computation prior to the availability of the message. Specifically, Sh...
Juan A. Garay, Vladimir Kolesnikov, Rae McLellan
DATE
2008
IEEE
142views Hardware» more  DATE 2008»
14 years 2 months ago
Developing Mesochronous Synchronizers to Enable 3D NoCs
The NETWORK-ON-CHIP (NOC) interconnection paradigm has been gaining momentum thanks to its flexibility, scalability and suitability to deep submicron technology processes. The ne...
Igor Loi, Federico Angiolini, Luca Benini