857 search results - page 17 / 172 » Implementing a STARI chip |
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
— Many of the issues that will be faced by the designers of multi-billion transistor chips may be alleviated by the presence of a flexible global communication infrastructure. I...
NIPS
1996
13 years 8 months ago
1996
A one-dimensional, visual tracking chip has been implemented using neuromorphic,analog VLSI techniques to modelselective visual attention in the control of saccadic and smooth pur...
ITCC
2005
IEEE
14 years 28 days ago
2005
IEEE
Hash algorithms are a class of cryptographic primitives used for fulfilling the requirements of integrity and authentication in cryptography. In this paper, we propose and present...
ISCAS
2005
IEEE
14 years 28 days ago
2005
IEEE
— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
IJCNN
2000
IEEE
13 years 11 months ago
2000
IEEE
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...