857 search results - page 18 / 172 » Implementing a STARI chip |
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Abstract-- A complementary ferroelectriccapacitor (CFC) logic-circuit style is proposed for a compact and standby-power-free content-addressable memory (CAM). Since the use of the ...
AUSAI
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. In order to apply nonmonotonic logics for specifying industrial automation controllers, we define (1) a method to extend atemporal nonmonotonic logics with temporal opera...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
BMCBI
2010
13 years 7 months ago
2010
Background: RNA structure prediction problem is a computationally complex task, especially with pseudo-knots. The problem is well-studied in existing literature and predominantly ...
DDECS
2008
IEEE
13 years 9 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...