Spatial image processing chips, known as silicon retinas, are based on the architecture of vertebrate retina and can be mathematically represented as the Laplacian of Gaussian (LO...
This discussion paper explores the problems of operating systems support when implementing concurrency controls at the level of the instruction set in processors designed for mult...
: Assigning one (more) shared resource(s) to several requesters is a function of arbiters (allocators). This class of decision-making modules can be implemented in a number of ways...
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networkson-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device u...