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» Implementing a STARI chip
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TVLSI
1998
135views more  TVLSI 1998»
13 years 9 months ago
Wave-pipelining: a tutorial and research survey
— Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of hig...
Wayne P. Burleson, Maciej J. Ciesielski, Fabian Kl...
CSC
2010
13 years 7 months ago
An Evaluation of Parallel Knapsack Algorithms on Multicore Architectures
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...
Hammad Rashid, Clara Novoa, Apan Qasem
ARC
2011
Springer
198views Hardware» more  ARC 2011»
13 years 1 months ago
NetStage/DPR: A Self-adaptable FPGA Platform for Application-Level Network Security
Increasing transmission speeds in high-performance networks pose significant challenges to protecting the systems and networking infrastructure. Reconfigurable devices have alrea...
Sascha Mühlbach, Andreas Koch
RECONFIG
2008
IEEE
198views VLSI» more  RECONFIG 2008»
14 years 4 months ago
High Performance Implementation of a Public Key Block Cipher - MQQ, for FPGA Platforms
– We have implemented in FPGA recently published class of public key algorithms – MQQ, that are based on quasigroup string transformations. Our implementation achieves decrypti...
Mohamed El-Hadedy, Danilo Gligoroski, Svein J. Kna...
JSAC
2008
94views more  JSAC 2008»
13 years 9 months ago
Soft-output sphere decoding: algorithms and VLSI implementation
Multiple-input multiple-output (MIMO) detection algorithms providing soft information for a subsequent channel decoder pose significant implementation challenges due to their high ...
Christoph Studer, Andreas Burg, Helmut Bölcsk...