857 search results - page 27 / 172 » Implementing a STARI chip |
ISCAS
2008
IEEE
14 years 4 months ago
2008
IEEE
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
— H.264/AVC (Advanced Video Codec) is a new video coding standard developed by a joint effort of the ITU-TVCEG and ISO/IEC MPEG. This standard provides higher coding efficiency r...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
We propose an analog current-mode subthreshold CMOS circuit implementing a neuromorphic oscillator. Our circuit is based on the half-center oscillator model proposed by Matsuoka, ...
CHES
2005
Springer
14 years 3 months ago
2005
Springer
During the last years, several masking schemes for AES have been proposed to secure hardware implementations against DPA attacks. In order to investigate the effectiveness of thes...
FPL
2008
Springer
13 years 11 months ago
2008
Springer
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...