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IJON
2006
73views more  IJON 2006»
13 years 9 months ago
Selective attention implemented with dynamic synapses and integrate-and-fire neurons
Selective attention is a process widely used by biological sensory systems to overcome the problem of limited parallel processing capacity: salient subregions of the input stimuli...
Chiara Bartolozzi, Giacomo Indiveri
APCCAS
2002
IEEE
92views Hardware» more  APCCAS 2002»
14 years 2 months ago
A cellular-automaton-type image extraction algorithm and its implementation using an FPGA
This paper proposes a new region extraction algorithm based on cellular automaton operation, which only utilizes the region boundary information of the image. A simple pixel circu...
Teppei Nakano, Takashi Morie, Makoto Nagata, Atsus...
IJES
2008
128views more  IJES 2008»
13 years 9 months ago
On-chip implementation of multiprocessor networks and switch fabrics
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...
Terry Tao Ye, Giovanni De Micheli
APCCAS
2006
IEEE
264views Hardware» more  APCCAS 2006»
14 years 3 months ago
FPGA-Based Design of a Pulsed-OFDM System
—An enhancement to the MB-OFDM system, known as Pulsed-OFDM, has been proposed to reduce the complexity and power consumption of the transceiver without sacrificing performance. ...
Kai-Chuan Chang, Gerald E. Sobelman
ISQED
2007
IEEE
206views Hardware» more  ISQED 2007»
14 years 4 months ago
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, ...