211 search results - page 3 / 43 » Implementing and Evaluating a Model Checker for Transactiona... |
MICRO
2008
IEEE
13 years 7 months ago
2008
IEEE
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
SBACPAD
2008
IEEE
14 years 1 months ago
2008
IEEE
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
EUROSYS
2007
ACM
14 years 4 months ago
2007
ACM
Software transactional memory (STM) is a promising technique for controlling concurrency in modern multi-processor architectures. STM aims to be more scalable than explicit coarse...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...