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» Implementing the PGI Accelerator model
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ASAP
2007
IEEE
111views Hardware» more  ASAP 2007»
14 years 2 months ago
Entropy Coding on a Programmable Processor Array for Multimedia SoC
Entropy encoding and decoding is a crucial part of any multimedia system that can be highly demanding in terms of computing power. Hardware implementation of typical compression a...
Roberto R. Osorio, Javier D. Bruguera
IPPS
2006
IEEE
14 years 1 months ago
Parallel genetic algorithm for SPICE model parameter extraction
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communitie...
Yiming Li, Yen-Yu Cho
BMCBI
2005
87views more  BMCBI 2005»
13 years 7 months ago
Efficient decoding algorithms for generalized hidden Markov model gene finders
Background: The Generalized Hidden Markov Model (GHMM) has proven a useful framework for the task of computational gene prediction in eukaryotic genomes, due to its flexibility an...
William H. Majoros, Mihaela Pertea, Arthur L. Delc...
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
12 years 11 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
FPL
2007
Springer
115views Hardware» more  FPL 2007»
14 years 2 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson