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» Implementing the scale vector-thread processor
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IFIP
1998
Springer
13 years 11 months ago
Migrating Objects in Electronic Commerce Applications
Electronic Commerce is a field of application that is distributed by nature where different parties share information and work concurrently and cooperatively on objects, potential...
Marko Boger
DAC
2010
ACM
13 years 11 months ago
Circuit modeling for practical many-core architecture design exploration
Current tools for computer architecture design lack standard support for multi- and many-core development. We propose using circuit models to describe the multiple processor archi...
Dean Truong, Bevan M. Baas
LSSC
2005
Springer
14 years 1 months ago
Systolic Architecture for Adaptive Censoring CFAR PI Detector
A new parallel algorithm for signal processing and a parallel systolic architecture of a robust constant false alarm rate (CFAR) processor with post-detection integration and adap...
Ivan Garvanov, Christo A. Kabakchiev, Plamen Daska...
WAE
2001
281views Algorithms» more  WAE 2001»
13 years 9 months ago
Using PRAM Algorithms on a Uniform-Memory-Access Shared-Memory Architecture
The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer. In this pa...
David A. Bader, Ajith K. Illendula, Bernard M. E. ...
ICCD
2004
IEEE
87views Hardware» more  ICCD 2004»
14 years 4 months ago
Evaluating Techniques for Exploiting Instruction Slack
In many workloads, 25% to 50% of instructions have slack allowing them to be delayed without impacting performance. To exploit this slack, processors may implement more power-efï¬...
Yau Chin, John Sheu, David Brooks