244 search results - page 3 / 49 » Implementing the scale vector-thread processor |
PARELEC
2000
IEEE
13 years 12 months ago
2000
IEEE
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Multiple sequence alignment is a fundamental and very computationally intensive task in molecular biology. MUSCLE, a new algorithm for creating multiple alignments of protein sequ...
DAC
2004
ACM
14 years 28 days ago
2004
ACM
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...
JGO
2010
13 years 6 months ago
2010
Abstract The ability of the modern graphics processors to operate on large matrices in parallel can be exploited for solving constrained image deblurring problems in a short time. ...
GCB
2009
Springer
14 years 2 months ago
2009
Springer
: Solving problems in bioinformatics often needs extensive computational power. Current trends in processor architecture, especially massive multi-core processors for graphic cards...