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DAC
2008
ACM
14 years 8 months ago
Robust chip-level clock tree synthesis for SOC designs
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
Anand Rajaram, David Z. Pan
SIGCOMM
2004
ACM
14 years 1 months ago
A wavelet-based approach to detect shared congestion
Per-flow congestion control helps endpoints fairly and efficiently share network resources. Better utilization of network resources can be achieved, however, if congestion manag...
Min Sik Kim, Taekhyun Kim, YongJune Shin, Simon S....
DSN
2007
IEEE
14 years 1 months ago
Superscalar Processor Performance Enhancement through Reliable Dynamic Clock Frequency Tuning
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
ICCI
1993
13 years 11 months ago
The Perfect and Imperfect Clocks Approach to Performance Analysis of Basic Timestamp Ordering in Distributed Databases
Locking and timestamping are two popular approaches to concurrency control in databases systems. Although more than a dozen analytic performance studies of locking techniques have...
Christos Bouras, Paul G. Spirakis
TCAD
2008
100views more  TCAD 2008»
13 years 7 months ago
Robust Clock Tree Routing in the Presence of Process Variations
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu