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ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
14 years 2 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
MICRO
2007
IEEE
139views Hardware» more  MICRO 2007»
14 years 2 months ago
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP) system. Memory requests from different threads can interfere with each other. Existing memory acc...
Onur Mutlu, Thomas Moscibroda
CIKM
2007
Springer
14 years 2 months ago
Link analysis using time series of web graphs
Link analysis is a key technology in contemporary web search engines. Most of the previous work on link analysis only used information from one snapshot of web graph. Since commer...
Lei Yang, Lei Qi, Yan-Ping Zhao, Bin Gao, Tie-Yan ...
DNA
2007
Springer
176views Bioinformatics» more  DNA 2007»
14 years 2 months ago
Asynchronous Spiking Neural P Systems: Decidability and Undecidability
In search for “realistic” bio-inspired computing models, we consider asynchronous spiking neural P systems, in the hope to get a class of computing devices with decidable prope...
Matteo Cavaliere, Ömer Egecioglu, Oscar H. Ib...
3DPVT
2006
IEEE
199views Visualization» more  3DPVT 2006»
14 years 2 months ago
Fast Level Set Multi-View Stereo on Graphics Hardware
In this paper, we show the importance and feasibility of much faster multi-view stereo reconstruction algorithms relying almost exclusively on graphics hardware. Reconstruction al...
Patrick Labatut, Renaud Keriven, Jean-Philippe Pon...