Sciweavers

214 search results - page 9 / 43
» Improved Boundary Scan Design
Sort
View
DAC
1999
ACM
14 years 10 months ago
ICEBERG: An Embedded In-Circuit Emulator Synthesizer for Microcontrollers
This paper presents a synthesis tool ICEBERG for embedded in-circuit emulators (ICE's), that are part of the development environment for microcontroller (or microprocessor)-b...
Ing-Jer Huang, Tai-An Lu
ASPDAC
2006
ACM
105views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Speed binning aware design methodology to improve profit under parameter variations
—Designing high-performance systems with high yield under parameter variations has raised serious design challenges in nanometer technologies. In this paper, we propose a profit-...
Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saib...
CAD
2004
Springer
13 years 9 months ago
ESOLID - a system for exact boundary evaluation
We present a system, ESOLID, that performs exact boundary evaluation of low-degree curved solids in reasonable amounts of time. ESOLID performs accurate Boolean operations using e...
John Keyser, Tim Culver, Mark Foskey, Shankar Kris...
KDD
2006
ACM
153views Data Mining» more  KDD 2006»
14 years 10 months ago
Spatial scan statistics: approximations and performance study
Spatial scan statistics are used to determine hotspots in spatial data, and are widely used in epidemiology and biosurveillance. In recent years, there has been much effort invest...
Deepak Agarwal, Andrew McGregor, Jeff M. Phillips,...
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 10 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen