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ICPP
1998
IEEE
14 years 2 months ago
Improving Parallel-Disk Buffer Management using Randomized Writeback
We address the problems of I/O scheduling and buffer management for general reference strings in a parallel I/O system. Using the standard parallel disk model withD disks and a sh...
Mahesh Kallahalla, Peter J. Varman
ICCAD
2006
IEEE
99views Hardware» more  ICCAD 2006»
14 years 6 months ago
Variability and yield improvement: rules, models, and characterization
Yield and variability are becoming detractors for successful design in sub-90-nm process technologies. We consider the fundamental lithography and process issues that are driving ...
Kenneth L. Shepard, Daniel N. Maynard
AIIDE
2009
13 years 11 months ago
Using Semantics to Improve the Design of Game Worlds
Design of game worlds is becoming more and more laborintensive because of the increasing demand and complexity of content. This is being partially addressed by developing semi-aut...
Tim Tutenel, Ruben Michaël Smelik, Rafael Bid...
FPGA
2006
ACM
90views FPGA» more  FPGA 2006»
14 years 1 months ago
Improving performance and robustness of domain-specific CPLDs
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run-time reconfigurabil...
Mark Holland, Scott Hauck
ICCAD
2008
IEEE
177views Hardware» more  ICCAD 2008»
14 years 6 months ago
Double patterning technology friendly detailed routing
— Double patterning technology (DPT) is a most likely lithography solution for 32/22nm technology nodes as of 2008 due to the delay of Extreme Ultra Violet lithography. However, ...
Minsik Cho, Yongchan Ban, David Z. Pan