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VLSID
2006
IEEE
136views VLSI» more  VLSID 2006»
14 years 10 months ago
Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal
Serial links in network on chip provide advantages in terms of reduced wiring area, reduced switch complexity and power. However, serial links offer lower bandwidth in comparison ...
Simon Ogg, Bashir M. Al-Hashimi
SIGMOD
2001
ACM
108views Database» more  SIGMOD 2001»
14 years 10 months ago
Improving Index Performance through Prefetching
This paper proposes and evaluates Prefetching B+ -Trees pB+ -Trees, which use prefetching to accelerate two important operations on B+ -Tree indices: searches and range scans. To ...
Shimin Chen, Phillip B. Gibbons, Todd C. Mowry
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 7 months ago
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure
This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...
CHI
2010
ACM
14 years 5 months ago
Leveraging gesture and voice data to improve group brainstorming
We seek to investigate how co-located group brainstorming could be enhanced through computational tools that leverage gestures and voice cues. To pursue this goal we are developin...
Deirdre Garrahan, Orit Shaer, Andreya Piplica, Kev...
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
14 years 5 months ago
Improving compressed test pattern generation for multiple scan chain failure diagnosis
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...