1792 search results - page 63 / 359 » Improved scheduling in rings |
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
ESTIMEDIA
2008
Springer
13 years 11 months ago
2008
Springer
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
ISQED
2007
IEEE
14 years 4 months ago
2007
IEEE
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
DAC
2009
ACM
14 years 11 months ago
2009
ACM
Heterogeneous multicore processors promise high execution
efficiency under diverse workloads, and program scheduling is
critical in exploiting this efficiency. This paper present...
INFOCOM
2009
IEEE
14 years 4 months ago
2009
IEEE
—Load balancing is a common approach for task assignment in distributed architectures. In this paper, we show that the degree of inefficiency in load balancing designs is highly...