Sciweavers

2201 search results - page 139 / 441
» Improvement of ASIC Design Processes
Sort
View
DATE
2007
IEEE
88views Hardware» more  DATE 2007»
15 years 9 months ago
Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann
102
Voted
HUC
2007
Springer
15 years 9 months ago
Why It's Worth the Hassle: The Value of In-Situ Studies When Designing Ubicomp
How should Ubicomp technologies be evaluated? While lab studies are good at sensing aspects of human behavior and revealing usability problems, they are poor at capturing context o...
Yvonne Rogers, Kay Connelly, Lenore Tedesco, Willi...
IPPS
2006
IEEE
15 years 9 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
139
Voted
IRI
2006
IEEE
15 years 9 months ago
Provide relevant knowledge to specify product design project needs
1 In many of today’s industry, knowledge is considered a strategic tool; however, knowledge is involved in so many services with so many facets that it is very complex to effecti...
Fabrice Alizon, Steven B. Shooter, Timothy W. Simp...
91
Voted
ISCAS
2006
IEEE
101views Hardware» more  ISCAS 2006»
15 years 9 months ago
A cost-effective reconfigurable accelerator for platform-based SOC design
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...
Lan-Da Van, Hsin-Fu Luo, Nien-Hsiang Chang, Chun-M...