2201 search results - page 249 / 441 » Improvement of ASIC Design Processes |
153
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MICRO
2008
IEEE
15 years 10 months ago
2008
IEEE
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
173
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NOCS
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
154
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Substantial increase in leakage current and threshold voltage fluctuations are making design of robust wide fan-in dynamic gates a challenging task. Traditionally, a PMOS keeper t...
159
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GECCO
2009
Springer
15 years 9 months ago
2009
Springer
New portable consumer embedded devices must execute multimedia applications (e.g., 3D games, video players and signal processing software, etc.) that demand extensive memory acces...
154
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USS
2004
15 years 5 months ago
2004
We present Tor, a circuit-based low-latency anonymous communication service. This second-generation Onion Routing system addresses limitations in the original design by adding per...