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» Improvement of ASIC Design Processes
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CASES
2010
ACM
15 years 2 months ago
Mighty-morphing power-SIMD
In modern wireless devices, two broad classes of compute-intensive applications are common: those with high amounts of data-level parallelism, such as signal processing used in wi...
Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Cl...
IPPS
2010
IEEE
15 years 2 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
139
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TWC
2010
14 years 11 months ago
Coordinated beamforming for the multicell multi-antenna wireless system
In a conventional wireless cellular system, signal processing is performed on a per-cell basis; out-of-cell interference is treated as background noise. This paper considers the be...
Hayssam Dahrouj, Wei Yu
ISQED
2002
IEEE
105views Hardware» more  ISQED 2002»
15 years 9 months ago
Measurement of Inherent Noise in EDA Tools
With advancing semiconductor technology and exponentially growing design complexities, predictability of design tools becomes an important part of a stable top-down design process...
Andrew B. Kahng, Stefanus Mantik
147
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HPCA
2000
IEEE
15 years 9 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...