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» Improvement of ASIC Design Processes
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148
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CODES
2004
IEEE
15 years 8 months ago
Fast exploration of bus-based on-chip communication architectures
As a result of improvements in process technology, more and more components are being integrated into a single System-on-Chip (SoC) design. Communication between these components ...
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
225
Voted
VLSISP
2011
358views Database» more  VLSISP 2011»
14 years 11 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
146
Voted
DAC
2005
ACM
16 years 5 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
151
Voted
MABS
2005
Springer
15 years 10 months ago
Automatic Tuning of Agent-Based Models Using Genetic Algorithms
When developping multi-agent systems (MAS) or models in the context of agent-based simulation (ABS), the tuning of the model constitutes a crucial step of the design process. Inde...
Benoît Calvez, Guillaume Hutzler
167
Voted
CSCW
2004
ACM
15 years 10 months ago
Lessons from the reMail prototypes
Electronic mail has become the most widely-used application for business productivity and communication, yet many people are frustrated with their email. Though email usage has ch...
Dan Gruen, Steven L. Rohall, Suzanne O. Minassian,...