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» Improvement of ASIC Design Processes
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TCOS
2010
13 years 2 months ago
PET SNAKE: A Special Purpose Architecture to Implement an Algebraic Attack in Hardware
Abstract. In [24] Raddum and Semaev propose a technique to solve systems of polynomial equations over F2 as occurring in algebraic attacks on block ciphers. This approach is known ...
Willi Geiselmann, Kenneth Matheis, Rainer Steinwan...
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
13 years 11 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
IV
2006
IEEE
82views Visualization» more  IV 2006»
14 years 1 months ago
Two sides of the story: Visualising Products and Processes in Engineering Design
This paper describes research on the use of multiple views for modelling products and processes in the design of complex products. Single visual representations of design models o...
René Keller, Tomás L. Flanagan, Clau...
ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 9 months ago
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay,...