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» Improvement of ASIC Design Processes
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GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
14 years 27 days ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
FPL
2009
Springer
107views Hardware» more  FPL 2009»
14 years 6 days ago
An FPGA based verification platform for HyperTransport 3.x
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
Heiner Litz, Holger Fröning, Maximilian Th&uu...
FECS
2006
102views Education» more  FECS 2006»
13 years 9 months ago
Improving Student Motivation in a Computing Course for Non-Majors
- This paper focuses on introductory computer science courses offered to students not majoring in computer science. In particular, the issues of student motivation and engagement i...
Stan Kurkovsky
CODES
2007
IEEE
14 years 1 months ago
Performance improvement of block based NAND flash translation layer
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
Siddharth Choudhuri, Tony Givargis
SIGCSE
2008
ACM
211views Education» more  SIGCSE 2008»
13 years 7 months ago
Cluster computing for web-scale data processing
In this paper we present the design of a modern course in cluster computing and large-scale data processing. The defining differences between this and previously published designs...
Aaron Kimball, Sierra Michels-Slettvet, Christophe...