Sciweavers

2201 search results - page 51 / 441
» Improvement of ASIC Design Processes
Sort
View
ICASSP
2011
IEEE
12 years 11 months ago
Improving head-related impulse response measured in noisy environments with spatio-temporal frequency analysis
A new noise reduction method based on spatio-temporal frequency analysis is proposed that can be applied to head-related impulse response (HRIR), which is an impulse response betw...
Takanori Nishino, Kazuya Takeda
DAC
1999
ACM
13 years 12 months ago
Application of High Level Interface-Based Design to Telecommunications System Hardware
The assumption in moving system modelling to higher levels is that this improves the design process by allowing exploration of the architecture, providing an unambiguous specifica...
Dyson Wilkes, M. M. Kamal Hashmi
ICASSP
2008
IEEE
14 years 2 months ago
Blind source separation in a distributed microphone meeting environment for improved teleconferencing
From an audio perspective, the present state of teleconferencing technology leaves something to be desired; speaker overlap is one of the causes of this inadequate performance. To...
Jacek P. Dmochowski, Zicheng Liu, Philip A. Chou
ICASSP
2011
IEEE
12 years 11 months ago
Optimum chip pulse shape design for timing synchronization
In this work a systematic methodology is presented to design optimum chip pulse shapes for DS-CDMA systems for timing synchronization. A nonlinear bi-objective problem with additi...
Felix Antreich, Josef A. Nossek
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
14 years 1 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...