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ISCAS
2007
IEEE
121views Hardware» more  ISCAS 2007»
14 years 4 months ago
Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design
Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequen...
Karthik Krishnamoorthy, Sarat C. Maruvada, Florin ...
ICASSP
2010
IEEE
13 years 10 months ago
Robust critical data recovery for MPEG-4 AAC encoded bitstreams
This paper presents a bandwidth-efficient method for improved decoding of critical data generated by the MPEG-4 AAC audio coder when encoded bitstreams are transmitted over noisy...
Ruijing Hu, Xucen Huang, Michel Kieffer, Olivier D...
JUCS
2006
175views more  JUCS 2006»
13 years 10 months ago
The Design of the YAP Compiler: An Optimizing Compiler for Logic Programming Languages
: Several techniques for implementing Prolog in a efficient manner have been devised since the original interpreter, many of them aimed at achieving more speed. There are two main ...
Anderson Faustino da Silva, Vítor Santos Co...
AP2PS
2009
IEEE
14 years 4 months ago
FLaCoSt: A Novel Peer to Peer Architecture for Video Streaming in a Next Generation Network
Abstract—This paper proposes a peer-to-peer video streaming delivery system within the framework of Next Generation Networks using Application Level Multicast. Increased efficie...
Jaime García-Reinoso, Alex Bikfalvi, Iv&aac...
HEURISTICS
2008
92views more  HEURISTICS 2008»
13 years 10 months ago
Learning heuristics for basic block instruction scheduling
Instruction scheduling is an important step for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction scheduling is to ...
Abid M. Malik, Tyrel Russell, Michael Chase, Peter...