Sciweavers

434 search results - page 53 / 87
» Improving Data Access Performance with Server Push Architect...
Sort
View
HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 3 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...
COMCOM
2007
149views more  COMCOM 2007»
13 years 8 months ago
Cache invalidation strategies for internet-based mobile ad hoc networks
Internet-based mobile ad hoc network (IMANET) combines a mobile ad hoc network (MANET) and the Internet to provide universal information accessibility. Although caching frequently...
Sunho Lim, Wang-Chien Lee, Guohong Cao, Chita R. D...
ICAC
2007
IEEE
14 years 18 days ago
Exploiting Platform Heterogeneity for Power Efficient Data Centers
It has recently become clear that power management is of critical importance in modern enterprise computing environments. The traditional drive for higher performance has influenc...
Ripal Nathuji, Canturk Isci, Eugene Gorbatov
ASPLOS
1992
ACM
14 years 24 days ago
Non-Volatile Memory for Fast, Reliable File Systems
Given the decreasing cost of non-volatile RAM (NVRAM), by the late 1990's it will be feasible for most workstations to include a megabyte or more of NVRAM, enabling the desig...
Mary Baker, Satoshi Asami, Etienne Deprit, John K....