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ASPLOS
2004
ACM
14 years 2 months ago
Compiler orchestrated prefetching via speculation and predication
This paper introduces a compiler-orchestrated prefetching system as a unified framework geared toward ameliorating the gap between processing speeds and memory access latencies. ...
Rodric M. Rabbah, Hariharan Sandanagobalane, Mongk...
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
LCTRTS
2007
Springer
14 years 2 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
SIGCOMM
2006
ACM
14 years 2 months ago
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patr...
CSE
2009
IEEE
14 years 3 months ago
Using Discovery and Monitoring Services to Support Context-Aware Remote Assisted Living Applications
Ubiquitous and pervasive applications are aware of the context of the used resources. This class of application can benefit from mechanisms to discover resources (devices and sens...
André Luiz B. Rodrigues, Izabela C. Gomes, ...