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APPT
2007
Springer
14 years 1 months ago
Replication-Based Partial Dynamic Scheduling on Heterogeneous Network Processors
It is a great challenge to map network processing tasks to processing resources of advanced network processors, which are heterogeneous and multi-threading multiprocessor System-on...
Zhiyong Yu, Zhiyi Yang, Fan Zhang, Zhiwen Yu, Tuan...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 4 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
JPDC
2008
167views more  JPDC 2008»
13 years 7 months ago
A performance study of general-purpose applications on graphics processors using CUDA
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly progr...
Shuai Che, Michael Boyer, Jiayuan Meng, David Tarj...
ISPASS
2005
IEEE
14 years 1 months ago
Performance Characterization of Java Applications on SMT Processors
As Java is emerging as one of the major programming languages in software development, studying how Java applications behave on recent SMT processors is of great interest. This pa...
Wei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang