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HPCA
2006
IEEE
14 years 8 months ago
Efficient instruction schedulers for SMT processors
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
Joseph J. Sharkey, Dmitry V. Ponomarev
SIGMOD
2008
ACM
190views Database» more  SIGMOD 2008»
14 years 7 months ago
OLTP through the looking glass, and what we found there
Online Transaction Processing (OLTP) databases include a suite of features -- disk-resident B-trees and heap files, locking-based concurrency control, support for multi-threading ...
Stavros Harizopoulos, Daniel J. Abadi, Samuel Madd...
SIGMOD
2009
ACM
137views Database» more  SIGMOD 2009»
14 years 7 months ago
Advances in flash memory SSD technology for enterprise database applications
The past few decades have witnessed a chronic and widening imbalance among processor bandwidth, disk capacity, and access speed of disk. According to Amdhal's law, the perfor...
Sang-Won Lee, Bongki Moon, Chanik Park
ICDE
2005
IEEE
134views Database» more  ICDE 2005»
14 years 1 months ago
Index Structures for Matching XML Twigs Using Relational Query Processors
Various index structures have been proposed to speed up the evaluation of XML path expressions. However, existing XML path indices suffer from at least one of three limitations: ...
Zhiyuan Chen, Johannes Gehrke, Flip Korn, Nick Kou...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...