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MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
14 years 2 months ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas
MICRO
2009
IEEE
207views Hardware» more  MICRO 2009»
14 years 2 months ago
Extending the effectiveness of 3D-stacked DRAM caches with an adaptive multi-queue policy
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
Gabriel H. Loh
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
SIGMOD
2006
ACM
110views Database» more  SIGMOD 2006»
14 years 7 months ago
Supporting ad-hoc ranking aggregates
This paper presents a principled framework for efficient processing of ad-hoc top-k (ranking) aggregate queries, which provide the k groups with the highest aggregates as results....
Chengkai Li, Kevin Chen-Chuan Chang, Ihab F. Ilyas
EDBT
2006
ACM
191views Database» more  EDBT 2006»
14 years 7 months ago
Parallelizing Skyline Queries for Scalable Distribution
Skyline queries help users make intelligent decisions over complex data, where different and often conflicting criteria are considered. Current skyline computation methods are rest...
Ping Wu, Caijie Zhang, Ying Feng, Ben Y. Zhao, Div...