38 search results - page 3 / 8 » Improving FPGA Performance and Area Using an Adaptive Logic ... |
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
FCCM
2003
IEEE
14 years 23 days ago
2003
IEEE
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
FPL
1997
Springer
13 years 11 months ago
1997
Springer
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...