2032 search results - page 40 / 407 » Improving Java performance using hardware translation |
ISCA
1989
IEEE
15 years 6 months ago
1989
IEEE
Most current single-chip processors employ an on-chip instruction cache to improve performance. A miss in this insk-uction cache will cause an external memory reference which must...
164
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BMCBI
2011
14 years 6 months ago
2011
Background: Rapid annotation and comparisons of genomes from multiple isolates (pan-genomes) is becoming commonplace due to advances in sequencing technology. Genome annotations c...
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Sophisticated C compiler support for network processors (NPUs) is required to improve their usability and consequently, their acceptance in system design. Nonetheless, high-level ...
114
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DSD
2009
IEEE
15 years 9 months ago
2009
IEEE
—The 2D Discrete Wavelet Transform (DWT) is a time-consuming kernel in many multimedia applications such as JPEG2000 and MPEG-4. The 2D DWT consists of horizontal filtering alon...
122
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ICASSP
2010
IEEE
14 years 9 months ago
2010
IEEE
Cooperative communication with multi-antenna relays can significantly increase the reliability and speed. However, cooperative MIMO detection would impose considerable complexity o...