68 search results - page 4 / 14 » Improving Memory Subsystem Performance Using ViVA: Virtual V... |
ISLPED
2005
ACM
14 years 1 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
ASPLOS
1992
ACM
13 years 11 months ago
1992
ACM
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MIPS range or higher. While this trend suggests that memory management for most p...
CONEXT
2008
ACM
13 years 9 months ago
2008
ACM
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Dual-execution/checkpointing based transient error tolerance techniques have been widely used in the high-end mission critical systems. These techniques, however, are not very att...
EICS
2009
ACM
14 years 2 months ago
2009
ACM
Single-user, desktop-based computer applications are pervasive in our daily lives and work. The prospect of using these applications with innovative interaction systems, like mult...