328 search results - page 10 / 66 » Improving Performance of Small On-Chip Instruction Caches |
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
ISVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
PLDI
1995
ACM
13 years 11 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...