328 search results - page 26 / 66 » Improving Performance of Small On-Chip Instruction Caches |
SIGMOD
1998
ACM
13 years 12 months ago
1998
ACM
Caching has been proposed (and implemented) by OLAP systems in order to reduce response times for multidimensional queries. Previous work on such caching has considered table leve...
ASPLOS
1994
ACM
13 years 11 months ago
1994
ACM
Several researchers have proposed algorithms for basic block reordering. We call these branch alignment algorithms. The primary emphasis of these algorithms has been on improving ...
MICRO
2003
IEEE
14 years 26 days ago
2003
IEEE
A dynamic optimizer is a runtime software system that groups a program’s instruction sequences into traces, optimizes those traces, stores the optimized traces in a softwarebase...
CF
2006
ACM
14 years 1 months ago
2006
ACM
Bytecode hardware-translation improves the performance of a Java Virtual Machine (JVM) with small hardware resource and complexity overhead. Instruction folding is a technique to ...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Modern processors use branch target buffers (BTBs) to predict the target address of branches such that they can fetch ahead in the instruction stream increasing concurrency and pe...