328 search results - page 54 / 66 » Improving Performance of Small On-Chip Instruction Caches |
ISPDC
2010
IEEE
13 years 6 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
The key to high performance in Simultaneous Multithreaded (SMT) processors lies in optimizing the distribution of shared resources to active threads. Existing resource distributio...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
ICTAI
2007
IEEE
14 years 1 months ago
2007
IEEE
Constraint satisfaction and propositional satisfiability problems are often solved using backtracking search. Previous studies have shown that portfolios of backtracking algorith...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
Modern embedded processors use small and simple branch predictors to improve performance. Using complex and accurate branch predictors, while desirable, is not possible as such pre...