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» Improving Performance of Small On-Chip Instruction Caches
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VEE
2009
ACM
107views Virtualization» more  VEE 2009»
14 years 2 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta
IPCCC
2007
IEEE
14 years 1 months ago
A Hybrid Disk-Aware Spin-Down Algorithm with I/O Subsystem Support
To offset the significant power demands of hard disk drives in computer systems, drives are typically powered down during idle periods. This saves power, but accelerates duty cyc...
Timothy Bisson, Scott A. Brandt, Darrell D. E. Lon...
FAST
2003
13 years 8 months ago
Data Staging on Untrusted Surrogates
We show how untrusted computers can be used to facilitate secure mobile data access. We discuss a novel architecture, data staging, that improves the performance of distributed ...
Jason Flinn, Shafeeq Sinnamohideen, Niraj Tolia, M...
ISCA
2006
IEEE
150views Hardware» more  ISCA 2006»
14 years 1 months ago
Spatial Memory Streaming
Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and a...
Stephen Somogyi, Thomas F. Wenisch, Anastassia Ail...
CASES
2003
ACM
14 years 22 days ago
Frequent loop detection using efficient non-intrusive on-chip hardware
Dynamic software optimization methods are becoming increasingly popular for improving software performance and power. The first step in dynamic optimization consists of detecting ...
Ann Gordon-Ross, Frank Vahid