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PIMRC
2010
IEEE
15 years 2 months ago
How to improve the performance in Delay Tolerant Networks under Manhattan Mobility Model
Delay Tolerant networks (DTNs) are one type of wireless networks where the number of nodes per unit area is small and hence the connectivity between the nodes is intermittent. In t...
Mouna Abdelmoumen, Eya Dhib, Mounir Frikha, Tijani...
LCTRTS
2010
Springer
15 years 2 months ago
Improving both the performance benefits and speed of optimization phase sequence searches
The issues of compiler optimization phase ordering and selection present important challenges to compiler developers in several domains, and in particular to the speed, code size,...
Prasad A. Kulkarni, Michael R. Jantz, David B. Wha...
DATE
2009
IEEE
129views Hardware» more  DATE 2009»
15 years 11 months ago
Improved performance and variation modelling for hierarchical-based optimisation of analogue integrated circuits
A new approach in hierarchical optimisation is presented which is capable of optimising both the performance and yield of an analogue design. Performance and yield trade offs are ...
Sawal Ali, Li Ke, Reuben Wilcock, Peter Wilson
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
15 years 11 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee
SSDBM
2006
IEEE
163views Database» more  SSDBM 2006»
15 years 10 months ago
ACache: Using Caching to Improve the Performance of Multiple Sequence Alignments
Multiple sequence alignment represents a class of powerful bioinformatics tools with many uses in computational biology ranging from discovery of characteristic motifs and conserv...
Xun Tu, Kajal T. Claypool, Cindy X. Chen