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TVLSI
2008
115views more  TVLSI 2008»
13 years 10 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
PLDI
1994
ACM
14 years 2 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar
DATE
2008
IEEE
129views Hardware» more  DATE 2008»
14 years 4 months ago
Memory Technology for Extended Large-Scale Integration in Future Electronics Applications
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
Dinesh Pamunuwa
IEEEARES
2006
IEEE
14 years 4 months ago
Secure Enhanced Wireless Transfer Protocol
When IEEE 802.11i draft[1] proposed TKIP, it is expected to improve WEP on both active and passive attack methods. TKIP uses more sophisticated methods to distribute and manage se...
Jin-Cherng Lin, Yu-Hsin Kao, Chen-Wei Yang
MICRO
2006
IEEE
104views Hardware» more  MICRO 2006»
14 years 4 months ago
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors
Although silicon optical technology is still in its formative stages, and the more near-term application is chip-to-chip communication, rapid advances have been made in the develo...
Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, Jo...