1045 search results - page 126 / 209 » Improving SHA-2 Hardware Implementations |
FCCM
2008
IEEE
14 years 2 months ago
2008
IEEE
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
GLOBECOM
2008
IEEE
14 years 2 months ago
2008
IEEE
−A class of combinatorial structures, called absorbing sets, strongly influences the performance of low-density paritycheck (LDPC) decoders at low error rates. Past experiments h...
RTAS
2008
IEEE
14 years 2 months ago
2008
IEEE
We build on PTIDES, a programming model for distributed embedded systems that uses discrete-event (DE) models as program specifications. PTIDES improves on distributed DE executi...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
The use of multi-core, multi-processor machines is opening new opportunities for software speculation, where program code is speculatively executed to improve performance at the a...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
— This paper presents a method of low-power variable-block-size motion estimation using pixel truncation. Previous work focused on implementing pixel truncation using fixed-bloc...